Full Time
Irvine, CA
Posted 1 week ago

U.S. Citizens only
Location: Irvine, CA
Salary: ~$200K

Job Description

THE OPPORTUNITY
Our company is seeking a full-time Senior FPGA Design Engineer reporting to the Director of FPGA Engineering on
the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and
development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient
implementation of novel signal processing algorithms for Our company’ MIMO wireless networking products. In
addition, they participate in the support and development of FPGA-based designs for our advanced wireless
systems R&D. These are exciting projects targeted to address challenging real-world communication needs.
The Senior FPGA Design Engineer will be based at our new Our company office, located in Irvine, CA. The position
will be on a hybrid schedule, with a minimum of 4 days/week on-site (with the occasional drive to the Los Angeles
HQ as needed).
The following is a list of at least some of the current essential job functions of the position. Management may
assign or reassign duties and responsibilities at any time at its discretion.

ROLE AND RESPONSIBILITIES
 Digital design architecting for wireless communication projects.
 Fixed point design of signal processing blocks while working with systems engineers.
 RTL coding, simulation, and test bench development.
 FPGA synthesis and timing closure.
 Hardware verification and troubleshooting; familiarity with logic analyzers.
 Provide support to the RF and Software Engineering Teams.

REQUIRED QUALIFICATIONS
 Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant fields.
 Minimum 6 years of demonstrated experience in FPGA design; 4 years of FPGA design experience with a
Master’s of Science degree; 2 years of FPGA design experience with a PhD degree.
 Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
 Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
 Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES
 Master of Science degree in Electrical Engineering (MSEE).
 Basic MATLAB skill.
 Experience with communication systems on FPGA or ASIC designs.

NOTE – As a US Federal Contractor, Our company requires that ALL candidates being considered for employment
for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen
ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications
section of the posted position. This does NOT apply to International positions; only job postings for positions
located in the US. All Employment is contingent upon the successful clearance of a background check.

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