The PMIC Systems Engineer (or PMIC Architect) is a member of the PMIC design team responsible for the high-level architecture of the power management IC used in the ETAdvanced technology. The engineer works closely with the RF systems team to determine IC requirements, with other power management experts on staff at Eta Wireless to determine optimal architecture, with IC designers to facilitate implementation, and with application engineers to evaluate performance vs. behavioral simulation. This position requires expertise in power management and experience in IC design is a benefit. The PMIC Systems Engineer (PMIC Architect) is a key contributor to new IP in the field.
Essential Job Responsibilities
- Brainstorm new architecture and approaches to requirements as defined in collaboration with PMIC designers and the RF systems team.
- Document and simulate concepts using Simplis or similar behavioral software.
- Specify IC block performance and ensure power management implementation matches desired architecture.
- Participate in design phases including reviews to compare behavioral model performance to IC simulation and bench performance.
- Debug to identify and resolve issues in IC simulation and bench measurements.
- The position will most often perform as a final reviewer.
- MSEE+5yrs experience, or PhD (preferred) in power electronics.
- IC design experience is desirable but not required.
- Deep theoretical understanding of magnetic and capacitive power management converters.
- Ability to analyze problems where established procedures do not exist and draw conclusions where considerable variation in interpretation is possible.