- Base salary can go to from $130k to $140k / Year.
- Full benefits and relocation.
- For this position, the hiring manager requires only 5 years and a BS degree. MS degree is a plus.
- USC, GS, TN Visa, L2/L4 and H1B visa is ok. They will transfer H1B visa.
- Candidates must have expertise and experience with Verilog or System Verilog.
You will work with state-of-the-art Xilinx FPGAs to deliver SOC ASIC Emulation platforms used for pre-silicon ASIC validation and FW Dev. The FPGA platforms are large scale, complex designs consisting of multiple FPGA motherboards and a variety of interfaces such as PCI, DDR, and FLASH. You will be on a well-established team of FPGA experts who routinely push the limits of what FPGAs can do.
Daily Tasks Include
- Using Vivado to synthesize ASIC RTL and generate bitstreams
- Resolving Vivado Timing and build issues such as routing congestion
- Working closely with Design, Validation, and Firmware teams to resolve issues
- Vivado/Quartus or equivolent
- Verilog/System Verilog
- Perl/TCL or Python
- Excellent Debug skills
- Work onsite in Colorado Springs; this is not a remote work position
- Timing Closure/Timing Constraints
- Logic Analyzers and Oscopes
- PCI Express
- ONFI/Toggle FLASH